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E-WASTE MANAGEMENT — WHY TO GO FOR IT

Published In: INTERNATIONAL CONFERENCE ON ADVANCES IN COMPUTER SCIENCE AND ELECTRONICS ENGINEERING
Author(s): ADITI MAKOL , SIDDHARTHA GUPTA

Abstract: In today’s world of rapid technological advances, what is the fate of old and discarded electronic equipments is worth a thought. As technology is renewed, a major challenge is the disposition process of obsolete equipment often termed as the “Equipment End life Crisis”. This research paper highlights why e-waste is so harmful and the statistics of waste generation figures. It emphasizes on the role of the global regulatory bodies by seeing the existing regulations in the field of e-waste management. The reason why some of the companies are doing E-waste management? What is the business value to a company doing e-waste management is studied. What is the potential that this sector offers to the recycling companies? It also highlights some of the class action suits around e-waste globally and different processes that organizations can follow to deal with the problem of E-waste. Global reporting standards for E-waste management are also recommended in this paper for the companies

  • Publication Date: 03-Feb-2020
  • DOI: 10.15224/978-981-07-1403-1-224
  • Views: 0
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LOW POWER 1-BIT 9T FULL ADDER CELL USING XNOR LOGIC

Published In: INTERNATIONAL CONFERENCE ON ADVANCES IN COMPUTER SCIENCE AND ELECTRONICS ENGINEERING
Author(s): SHIWANI SINGH, , B. P. SINGH , K. G. SHARMA , TRIPTI SHARMA

Abstract: In this paper a new low power and high performance 9T adder circuit using XNOR gate architecture is proposed which improves the performance of existing 8T adder by sacrificing the MOS transistor count by one. Simulation results demonstrate the superiority of the proposed adder against existing 8T adder in terms of power consumption and temperature sustainability. The combination of low power and better temperature sustainability makes the proposed full adder an optimal option for low power and energy efficient design. All simulations are performed on 90nm standard model on Tanner EDA tool version 13.0

  • Publication Date: 03-Feb-2020
  • DOI: 10.15224/978-981-07-1403-1-225
  • Views: 0
  • Downloads: 0