Abstract: This paper describes the mitigation of voltage sag and swell using battery based dynamic voltage restorer (DVR). The DVR is a power electronic based converter that provides three-phase controllable voltage source, whose magnitude of voltage and angle adds/subtracts to the source voltage during sag/swell. The DVR can inject a voltage at fundamental frequency in each phase of required magnitude and phase. The DVR can restore the load voltage within few milliseconds. DVR is a fast and efficient solution to voltage sag and voltage swell problems. The estimation of references voltages are based on Synchronous Reference Frame Theory (SRFT) and gate pulses are generated by sensing the source, load terminal voltages and supply currents. The Mitigation of voltage sag and swell using SRFT for Battery based DVR issimulated by using MATLAB/SIMULINK and power system Block set (PSB) toolboxes.

• Publication Date: 13-Jun-2013
• DOI: 10.15224/978-981-07-6935-2-80
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Abstract: As densities of FPGA are increasing day by day, the feasibility of doing floating point calculations on FPGAs has improved. Moreover, recent works in FPGA architecture have changed the design tradeoff space by providing new fixed circuit functions which may be employed in floating-point computations. By using high density multiplier blocks and shift registers efficient computational unit can be developed. This paper evaluates the use of such blocks for the design of floating-point units including adder, subtractor, multiplier and divider.

• Publication Date: 13-Jun-2013
• DOI: 10.15224/978-981-07-6935-2-79
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