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Proceedings of

International Conference on Advances in Computer Science and Electronics Engineering CSEE 2020

Date
03-Feb-2020
Location
delhi- NCR , India
Authors
51
ISBN
978-981-07-1403-1

23 Articles Published

1. OWNERSHIP IDENTIFICATION USING DISCRETE WAVELET TRANSFORM (DWT)-BASED LOGO WATERMARKING

Authors: GAYADHAR PANDA , T MITA KUMARI

Abstract: In this paper, an efficiently DWT-based watermarking technique is proposed to embed gray-scale logos as watermark in images to attest the owner identification and discourage the unauthorized copying. The method transforms both the host image and watermark into the discrete wavelet domain where their coefficients are fused adaptively based on Human Visual System (HVS) model to hide a higher energy hidden watermark in salient image components. The method repeatedly merges the watermark coefficients at the various resolution levels of the host image which provides simultaneous spatial localization and frequency spread of the watermark to provide robustness against different attacks. From the simulation results it can be observed that proposed method is robust to wide variety of attacks, such as image compression, linear or non-linear filtering, noise addition, image resizing, cropping, and image enhancement, etc.

Keywords: hidden, watermark, salient, image, component

Pages: 1 - 5 | DOI: 10.15224/978-981-07-1403-1-107

2. OWNERSHIP IDENTIFICATION USING DISCRETE WAVELET TRANSFORM (DWT)-BASED LOGO WATERMARKING

Authors: GAYADHAR PANDA , T MITA KUMARI

Abstract: In this paper, an efficiently DWT-based watermarking technique is proposed to embed gray-scale logos as watermark in images to attest the owner identification and discourage the unauthorized copying. The method transforms both the host image and watermark into the discrete wavelet domain where their coefficients are fused adaptively based on Human Visual System (HVS) model to hide a higher energy hidden watermark in salient image components. The method repeatedly merges the watermark coefficients at the various resolution levels of the host image which provides simultaneous spatial localization and frequency spread of the watermark to provide robustness against different attacks. From the simulation results it can be observed that proposed method is robust to wide variety of attacks, such as image compression, linear or non-linear filtering, noise addition, image resizing, cropping, and image enhancement, etc.

Keywords: hidden, watermark, salient, image, component

Pages: 1 - 5 | DOI: 10.15224/978-981-07-1403-1-107

3. CLUSTERING OF TEXT DOCUMENT USING KEA-MEANS WITH F-MEASURE

Authors: M.J.YEOLA

Abstract: Document clustering is an area that deals with the unsupervised grouping of text documents into meaningful groups, usually representing topics in the document collection. It is one way to organize information without requiring prior knowledge about the classification of documents. The well-known K-means clustering algorithm allows users to specify the number of clusters. However, if the pre-specified number of clusters is modified, the precision of each result also changes. To solve this problem, this paper proposes a new clustering algorithm based on the Kea keyphrase extraction algorithm. In this paper, documents are grouped into several clusters like K-means, but the number of clusters is automatically determined by finding out the similarities between documents and the extracted key phrases. It also calculates F-measure value using precision and recall which gives the better clusters.

Keywords: cluster, F-measure, precision, recall

Pages: 6 - 9 | DOI: 10.15224/978-981-07-1403-1-185

4. PERFORMANCE COMPARISION OF LEACH, SEP AND DEEC PROTOCOL IN WIRELESS SENSOR NETWORK

Authors: BRIJESH KUMAR , GEETAM SINGH TOMAR , TRIPTI SHARMA

Abstract: Wireless Sensor Network is the network of power-limited sensing devices called sensors. Wireless sensor network is differ from other networks in terms of optimization of amount of energy because when these sensors sense and transmit data to other sensors present in the network, considerable amount of energy is dissipated. Various routing algorithms are proposed to limit the powers used by the wireless sensors. Hierarchical routing protocols with the concept of clustering like LEACH and SEP and DEEC are already best known for maintaining energy efficiency. In this paper, we will compare these three protocols in terms of packet transmission, energy dissipation and number of nodes alive and stability period and we will discuss the advantage and disadvantage of these protocols under various conditions

Keywords: Wireless Sensor Networks, Stability period, LEACH protocol, SEP protocol, DEEC protocol

Pages: 10 - 15 | DOI: 10.15224/978-981-07-1403-1-198

5. EMBEDDED MULTIPROCESSOR ARCHITECTURE USING VHDL

Authors: C.N.BHOYAR , SUMEDH.S.JADHAV

Abstract: Embedded multiprocessor design presents challenges and opportunities that stem from task coarse granularity and the large number of inputs and outputs for each task. We have therefore designed a new architecture called embedded concurrent computing (ECC), which is implement on FPGA chip using VHDL. The design methodology is expected to allow scalable embedded multiprocessors for system expansion. In recent decades, two forces have driven the increase of the processor performance: Advances in very large-scale integration (VLSI) technology and Micro architectural enhancements. Therefore, we aim to design the full architecture of an embedded processor for realistic to perform arithmetic, logical, shifting and branching operations. We will be synthesize and evaluated the embedded system based on Xilinx environment. Processor performance is going to be improving through clock speed increases and the clock speed increases and the exploitation of instruction- level parallelism. We will be des

Keywords: Multiprocessor design; FPGA based embedded system design; Real time processor.

Pages: 16 - 20 | DOI: 10.15224/978-981-07-1403-1-202

6. EMBEDDED MULTIPROCESSOR ARCHITECTURE USING VHDL

Authors: C.N.BHOYAR , SUMEDH.S.JADHAV

Abstract: Embedded multiprocessor design presents challenges and opportunities that stem from task coarse granularity and the large number of inputs and outputs for each task. We have therefore designed a new architecture called embedded concurrent computing (ECC), which is implement on FPGA chip using VHDL. The design methodology is expected to allow scalable embedded multiprocessors for system expansion. In recent decades, two forces have driven the increase of the processor performance: Advances in very large-scale integration (VLSI) technology and Micro architectural enhancements. Therefore, we aim to design the full architecture of an embedded processor for realistic to perform arithmetic, logical, shifting and branching operations. We will be synthesize and evaluated the embedded system based on Xilinx environment. Processor performance is going to be improving through clock speed increases and the clock speed increases and the exploitation of instruction- level parallelism. We will be des

Keywords: Multiprocessor design; FPGA based embedded system design; Real time processor.

Pages: 16 - 20 | DOI: 10.15224/978-981-07-1403-1-202

7. MALWARE INCIDENT HANDLING

Authors: A.SANKARA NARAYANAN , M.MOHAMMED ASHIK

Abstract: The paper will be a detailed introduction of malware handling for security professionals. This paper will also serve as a guideline for the reader to perform malware handling by providing definitions, tools to use, and real world demonstration to the reader with enough information to successfully perform malware incident handling. . It will spotlight on step by step process, including suggestions on what tool to employ, what to look for and what to do with the disbelieving file. In our experiment we present the findings about the state of services, registry keys, security updates, and virus total results. Our analysis of the data demonstrates that malware detectors using tools and techniques

Keywords: services, registry keys, security updates

Pages: 21 - 25 | DOI: 10.15224/978-981-07-1403-1-210

8. MALWARE INCIDENT HANDLING

Authors: A.SANKARA NARAYANAN , M.MOHAMMED ASHIK

Abstract: The paper will be a detailed introduction of malware handling for security professionals. This paper will also serve as a guideline for the reader to perform malware handling by providing definitions, tools to use, and real world demonstration to the reader with enough information to successfully perform malware incident handling. . It will spotlight on step by step process, including suggestions on what tool to employ, what to look for and what to do with the disbelieving file. In our experiment we present the findings about the state of services, registry keys, security updates, and virus total results. Our analysis of the data demonstrates that malware detectors using tools and techniques

Keywords: services, registry keys, security updates

Pages: 21 - 25 | DOI: 10.15224/978-981-07-1403-1-210

9. MISSING VALUE ESTIMATION IN DNA MICROARRAY – A FUZZY APPROACH

Authors: KASHINATH DEY , SUJAY SAHA , SUMIT CHAKRABORTY

Abstract: DNA microarray technology which is used in molecular biology, allows for the observation of expression levels of thousands of genes under a variety of conditions. The analysis of microarray data has been successfully applied in a number of studies over a broad range of biological disciplines. Now it is very unfortunate that various microarray experiments generate data sets containing missing values. Since most of the algorithms for gene expression analysis require a complete gene array as input, the missing values need to estimate. The methods exist for estimating missing values are like KNNimpute, SVDimpute, LLSimpute, LLS-SVDimpute etc. In this paper we present a new fuzzy technique Fuzzy Difference Vector Impute (FDVimpute) for estimating missing values in a DNA microarray

Keywords: DNA microarray, missing value, LLS- SVDImpute, FDVImpute, Spellman dataset

Pages: 34 - 39 | DOI: 10.15224/978-981-07-1403-1-214

10. MISSING VALUE ESTIMATION IN DNA MICROARRAY – A FUZZY APPROACH

Authors: KASHINATH DEY , SUJAY SAHA , SUMIT CHAKRABORTY

Abstract: DNA microarray technology which is used in molecular biology, allows for the observation of expression levels of thousands of genes under a variety of conditions. The analysis of microarray data has been successfully applied in a number of studies over a broad range of biological disciplines. Now it is very unfortunate that various microarray experiments generate data sets containing missing values. Since most of the algorithms for gene expression analysis require a complete gene array as input, the missing values need to estimate. The methods exist for estimating missing values are like KNNimpute, SVDimpute, LLSimpute, LLS-SVDimpute etc. In this paper we present a new fuzzy technique Fuzzy Difference Vector Impute (FDVimpute) for estimating missing values in a DNA microarray

Keywords: DNA microarray, missing value, LLS- SVDImpute, FDVImpute, Spellman dataset

Pages: 34 - 39 | DOI: 10.15224/978-981-07-1403-1-214

11. DESIGN AND ANALYSIS OF THE CONTROL SYSTEM OF HIGH VOLTAGE (400KV DC) POWER SUPPLY FOR NEUTRON GENERATOR

Authors: P.S. ADHIKARI , RAM KUMAR PAUL , TARUN PATEL

Abstract: The ‘Neutron Generator Facility’ is operational at PURNIMA, BARC. The Neutron Generator is a 300KeV electrostatic DC accelerator. A 400 kV, 10mA DC power supply is being used for acceleration of deuteron beam. The HV power supply generates 400 kV from 3 phase Mains. The basic logic to generate 400 kV consists of following stages: Three phase Mains → Three phase Converter → High Frequency Inverter → Step-Up Transformer → Balanced CW Multiplier. The converter is controlled by SCR firing card & Converter control card and Inverter Protection Card controls the Inverter. Present project is to design a new PC based control system for SCR Firing, Converter & Inverter circuit to provide local and remote operation

Keywords: Accelerator, Converter, Inverter, Step-Up Transformer, CW Multiplier. 1. IN

Pages: 40 - 44 | DOI: 10.15224/978-981-07-1403-1-221

12. DESIGN AND ANALYSIS OF THE CONTROL SYSTEM OF HIGH VOLTAGE (400KV DC) POWER SUPPLY FOR NEUTRON GENERATOR

Authors: P.S. ADHIKARI , RAM KUMAR PAUL , TARUN PATEL

Abstract: The ‘Neutron Generator Facility’ is operational at PURNIMA, BARC. The Neutron Generator is a 300KeV electrostatic DC accelerator. A 400 kV, 10mA DC power supply is being used for acceleration of deuteron beam. The HV power supply generates 400 kV from 3 phase Mains. The basic logic to generate 400 kV consists of following stages: Three phase Mains → Three phase Converter → High Frequency Inverter → Step-Up Transformer → Balanced CW Multiplier. The converter is controlled by SCR firing card & Converter control card and Inverter Protection Card controls the Inverter. Present project is to design a new PC based control system for SCR Firing, Converter & Inverter circuit to provide local and remote operation

Keywords: Accelerator, Converter, Inverter, Step-Up Transformer, CW Multiplier. 1. IN

Pages: 40 - 44 | DOI: 10.15224/978-981-07-1403-1-221

13. A SURVEY ON OFFLINE-METHODS OF CHARACTER SEGMENTATION

Authors: JUHI KANERIA , KANDARP PANDYA , KRUTI J DANGARWALA , RUCHITA TAILOR , THAKKAR NIRAV B

Abstract: Character segmentation is the critical area of the Optical Character Recognition process. The higher recognition rates for isolated characters as compared to those obtained for words and connected character strings illustrate this fact. This paper provides a review of various techniques of character segmentation, which are classified mainly into four classes. In classical approach the input image is partitioned into sub images, which are then classified.

Keywords: segmentation, contextual method, graphemes, Hidden Markov Models, holistic recognition, Optical character recognition, recognition-based segmentation and survey

Pages: 45 - 51 | DOI: 10.15224/978-981-07-1403-1-222

14. SECURITY CHALLENGES & RESOLUTIONS IN CLOUD COMPUTING

Authors: SANDEEP JAIN

Abstract: Cloud computing is a model to provide on‐demand network, software and hardware resources to customers. It provides the infrastructure, storage and virtualization environment to end‐users without vendor’s interventions. The purpose of cloud computing is to provide as‐a‐service model to users. Usually Cloud suffers from various levels of risks because essential services are normally outsourced to third party. This makes very difficult for cloud vendors to maintain data privacy and providing failure free service availability. Cloud network requires a major review on security challenges. Inside cloud, it is difficult to locate the original data and sometimes the security processes are hidden behind the layers. The end user is not capable to see the ill effects of clouds while using its services. This paper presents the various scenarios of breaching the cloud security, its impact for the real world users, challenges & resolutions in cloud network. The paper discusses the risks involved dur

Keywords: Cloud Security Framework, Cloud Models, Data Center, Private/Public/Hybrid clouds

Pages: 52 - 60 | DOI: 10.15224/978-981-07-1403-1-223

15. E-WASTE MANAGEMENT — WHY TO GO FOR IT

Authors: ADITI MAKOL , SIDDHARTHA GUPTA

Abstract: In today’s world of rapid technological advances, what is the fate of old and discarded electronic equipments is worth a thought. As technology is renewed, a major challenge is the disposition process of obsolete equipment often termed as the “Equipment End life Crisis”. This research paper highlights why e-waste is so harmful and the statistics of waste generation figures. It emphasizes on the role of the global regulatory bodies by seeing the existing regulations in the field of e-waste management. The reason why some of the companies are doing E-waste management? What is the business value to a company doing e-waste management is studied. What is the potential that this sector offers to the recycling companies? It also highlights some of the class action suits around e-waste globally and different processes that organizations can follow to deal with the problem of E-waste. Global reporting standards for E-waste management are also recommended in this paper for the companies

Keywords: E-waste, Recycling, WEEE, RoHS, EPR, ORDEE

Pages: 61 - 66 | DOI: 10.15224/978-981-07-1403-1-224

16. LOW POWER 1-BIT 9T FULL ADDER CELL USING XNOR LOGIC

Authors: SHIWANI SINGH, , B. P. SINGH , K. G. SHARMA , TRIPTI SHARMA

Abstract: In this paper a new low power and high performance 9T adder circuit using XNOR gate architecture is proposed which improves the performance of existing 8T adder by sacrificing the MOS transistor count by one. Simulation results demonstrate the superiority of the proposed adder against existing 8T adder in terms of power consumption and temperature sustainability. The combination of low power and better temperature sustainability makes the proposed full adder an optimal option for low power and energy efficient design. All simulations are performed on 90nm standard model on Tanner EDA tool version 13.0

Keywords: 8T, 9T, XNOR gate, full adder and low power

Pages: 67 - 69 | DOI: 10.15224/978-981-07-1403-1-225

17. DEBUG AND OPTIMIZATION TECHNIQUES FOR PERFORMANCE ENHANCEMENT OF TERMINATION APPLICATION IN REAL TIME SYSTEM

Authors: SANDEEP MALIK , YASHPAL DUTTA

Abstract: Due to the rapid increase in network services per network node, the need for high throughput infrastructure is growing. Throughput and latency are two important criteria that need to be considered while working on Real Time Embedded Systems. With the advent of Real Time Operating systems, low latency can be achieved, but sometimes at the cost of performance. The situation becomes complex if the system has a networking termination application in the user-space operating with the kernel space driver. The paper presents how changes in Real Time Linux impose complexity in a network application both in kernel and user space. This paper also discusses ideas to identify problems and fixes available using Linux debugging tools. This paper concludes by sharing performance improvement data achieved in a user space networking application

Keywords: Performance, Real Time, Linux, Femto Cell, Termination, Networking, Debugging, User Space

Pages: 70 - 72 | DOI: 10.15224/978-981-07-1403-1-235

18. IMPLEMENTATION OF RECONSTRUCTION OF UNDERWATER IMAGE USING FPGA

Authors: MANGESH KAKDE , R.C. IYER

Abstract: Reconstruction of an underwater object from a sequence of images distorted by moving water waves is a challenging task. A new approach is presented in this paper. We make use of the bispectrum technique to analyze the raw image sequences and recover the phase information of the true object. We test our approach on both simulated and real-world data, separately. Results show that our algorithm is very promising. Such technique has wide applications to areas such as ocean study and submarine observation

Keywords: bispectrum, water wave, image, reconstruction, distortion, refraction

Pages: 73 - 76 | DOI: 10.15224/978-981-07-1403-1-241

19. ENCRYPTION MECHANISM FOR SYSTEM-ON-CHIP USING MINIDES ALGORITHM WITH DIGITAL SIGNATURE FOR SECURE COMMUNICATION OF EMBEDDED REAL TIME APPLICATIONS

Authors: KURRA MALLAIAH

Abstract: System-on-Chip applications have been widen to various public, private, government and social communication systems for handling security and trust as a systems for mission critical and e-government. Most mission critical and embedded real time applications run on System -on -Chip. SoCs will have limited resources, processing ability and rigid power constraints therefore, SoCs becomes a holdup when it comes to handling the complex and large footprint software [3]. saRTL is standalone Real Time Linux operating system with small footprint and having hard real time features. The bare kernel of saRTL is approximately 200KB only. Therefore using saRTL is a better option for SoC based applications. miniDES is a symmetric key encryption algorithm with very small footprint. Approximately, the size of algorithm is 3KB only and it has the power and elegance of Data Encryption Standard lgorithm (DES). Since, SoCs used in critical and Real Time embedded applications, security has to be enforced in

Keywords: Digital Signature, miniDES, standalone Real Time Linux, System -on-Chip, TCP/IP

Pages: 77 - 82 | DOI: 10.15224/978-981-07-1403-1-245

20. ELLIPTIC CURVE CRYPTOGRAPHIC ALGORITHM

Authors: SANTOSHI KETAN POTE

Abstract: This paper deals with an implementation of Elliptic Curve Cryptography Algorithm. The implementation includes Diffie Hellman Key Exchange and the Digital Signature Algorithm. This paperr gives an overview of Elliptic Curve Cryptography algorithm. Cryptography (or cryptology) from Greek word kryptos, “hidden, secret” and graph, “writing” is the practice and study of hiding information. Modern cryptography intersects the disciplines of mathematics, computer science, and engineering. Applications of cryptography include ATM cards, computer passwords, and electronic commerce. Cryptology prior to the modern age was almost synonymous with encryption, the conversion of information from a readable state to nonsense. The sender retained the ability to decrypt the information and therefore avoid unwanted persons being able to read it. The secret key cryptography and public key cryptography are the two main types of cryptography. RSA is the most prominent algorithm used in public key cryptography

Keywords: cryptography, RSA, Elliptic Curve.

Pages: 83 - 87 | DOI: 10.15224/978-981-07-1403-1-246

21. ELLIPTIC CURVE CRYPTOGRAPHIC ALGORITHM

Authors: SANTOSHI KETAN POTE

Abstract: This paper deals with an implementation of Elliptic Curve Cryptography Algorithm. The implementation includes Diffie Hellman Key Exchange and the Digital Signature Algorithm. This paperr gives an overview of Elliptic Curve Cryptography algorithm. Cryptography (or cryptology) from Greek word kryptos, “hidden, secret” and graph, “writing” is the practice and study of hiding information. Modern cryptography intersects the disciplines of mathematics, computer science, and engineering. Applications of cryptography include ATM cards, computer passwords, and electronic commerce. Cryptology prior to the modern age was almost synonymous with encryption, the conversion of information from a readable state to nonsense. The sender retained the ability to decrypt the information and therefore avoid unwanted persons being able to read it. The secret key cryptography and public key cryptography are the two main types of cryptography. RSA is the most prominent algorithm used in public key cryptography

Keywords: cryptography, RSA, Elliptic Curve.

Pages: 83 - 87 | DOI: 10.15224/978-981-07-1403-1-246

22. IMPLEMENTATION, ANALYSIS AND APPLICATION OF RETROACTIVE DATA STRUCTURES

Authors: PRAKHAR PANWARIA , SUNEETA AGARWAL

Abstract: Retroactive data structures, introduced by Demaine, Iacono and Langerman [1], represent a model through which operations can be performed on a data structure in past time. Here, in this paper, we focus on the data structures for which retroactivity hasn’t been implemented yet and the enhancements in existing Retroactive data structures. Besides going through the data structures used for their implementation, we also analyze their performance and demonstrate their usefulness through real life use-cases and applications.

Keywords: data structure, reteroactive data structure

Pages: 88 - 92 | DOI: 10.15224/978-981-07-1403-1-247

23. IMPLEMENTATION, ANALYSIS AND APPLICATION OF RETROACTIVE DATA STRUCTURES

Authors: PRAKHAR PANWARIA , SUNEETA AGARWAL

Abstract: Retroactive data structures, introduced by Demaine, Iacono and Langerman [1], represent a model through which operations can be performed on a data structure in past time. Here, in this paper, we focus on the data structures for which retroactivity hasn’t been implemented yet and the enhancements in existing Retroactive data structures. Besides going through the data structures used for their implementation, we also analyze their performance and demonstrate their usefulness through real life use-cases and applications.

Keywords: data structure, reteroactive data structure

Pages: 88 - 92 | DOI: 10.15224/978-981-07-1403-1-247

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