1. DESIGN OF MIMO-OFDM SYSTEMS PHYSICAL LAYER WITH MINIMAL HARDWARE COMPLEXITY AND LOW POWER CONSUMPTION
Authors: M.SARASWATHI
Abstract: In this paper the design of 128/64 point Fast Fourier transform processor (FFT Processor) is proposed to support future generation Multiple Input Multiple Output Orthogonal Frequency Division Multiplexing (MIMO OFDM) based IEEE 802.11n wireless local area network base band processor. The pipelined mixed radix delay feedback (MRMDF) FFT architecture is proposed to provide a higher throughput rate combining the characteristics of both Single path Delay Feedback (SDF) which is used to reduce memory size and Multipath Delay Commutator (MDF) by using the multidata-path scheme. That is higher throughput rate can be provided by using four parallel data path. The proposed processor not only supports the operation of FFT in 128 point and 64 point but can also provide different throughput rates for 1-4 simultaneous data sequence to meet IEEE 802.11n requirements. Further, less complexity is needed in this deign compared with traditional four parallel approach. The hardware cost of memory and com
Keywords: Complexity, Low, Power, Consumption